245 lines
7.7 KiB
C++
245 lines
7.7 KiB
C++
// Copyright (C) 2015 Jérôme Leclercq
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// This file is part of the "Nazara Engine - Core module"
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// For conditions of distribution and use, see copyright notice in Config.hpp
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#include <Nazara/Core/HardwareInfo.hpp>
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#include <Nazara/Core/Error.hpp>
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#include <algorithm>
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#include <cstdlib>
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#include <cstring>
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#if defined(NAZARA_PLATFORM_WINDOWS)
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#include <Nazara/Core/Win32/HardwareInfoImpl.hpp>
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#elif defined(NAZARA_PLATFORM_POSIX)
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#include <Nazara/Core/Posix/HardwareInfoImpl.hpp>
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#else
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#error Lack of implementation: HardwareInfo
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#endif
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#include <Nazara/Core/Debug.hpp>
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namespace Nz
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{
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namespace
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{
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struct VendorString
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{
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char vendor[13]; // +1 pour le \0 automatiquement ajouté par le compilateur
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ProcessorVendor vendorEnum;
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};
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// Exceptionellement, la valeur "unknown" est intégrée
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const char* vendorNames[] =
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{
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"Unknown", // ProcessorVendor_Unknown
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"Advanced Micro Devices", // ProcessorVendor_AMD
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"Centaur Technology", // ProcessorVendor_Centaur
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"Cyrix Corporation", // ProcessorVendor_Cyrix
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"Intel Corporation", // ProcessorVendor_Intel
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"Kernel-based Virtual Machine", // ProcessorVendor_KVM
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"Microsoft Hyper-V", // ProcessorVendor_HyperV
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"National Semiconductor", // ProcessorVendor_NSC
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"NexGen", // ProcessorVendor_NexGen
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"Rise Technology", // ProcessorVendor_Rise
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"Silicon Integrated Systems", // ProcessorVendor_SIS
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"Transmeta Corporation", // ProcessorVendor_Transmeta
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"United Microelectronics Corporation", // ProcessorVendor_UMC
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"VIA Technologies", // ProcessorVendor_VIA
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"VMware", // ProcessorVendor_VMware
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"Vortex86", // ProcessorVendor_Vortex
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"Xen" // ProcessorVendor_XenHVM
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};
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static_assert(sizeof(vendorNames)/sizeof(const char*) == ProcessorVendor_Max+2, "Processor vendor name array is incomplete");
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VendorString vendorStrings[] =
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{
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// Triés par ordre alphabétique (Majuscules primant sur minuscules)
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{"AMDisbetter!", ProcessorVendor_AMD},
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{"AuthenticAMD", ProcessorVendor_AMD},
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{"CentaurHauls", ProcessorVendor_Centaur},
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{"CyrixInstead", ProcessorVendor_Cyrix},
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{"GenuineIntel", ProcessorVendor_Intel},
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{"GenuineTMx86", ProcessorVendor_Transmeta},
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{"Geode by NSC", ProcessorVendor_NSC},
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{"KVMKVMKVMKVM", ProcessorVendor_KVM},
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{"Microsoft Hv", ProcessorVendor_HyperV},
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{"NexGenDriven", ProcessorVendor_NexGen},
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{"RiseRiseRise", ProcessorVendor_Rise},
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{"SiS SiS SiS ", ProcessorVendor_SIS},
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{"TransmetaCPU", ProcessorVendor_Transmeta},
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{"UMC UMC UMC ", ProcessorVendor_UMC},
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{"VIA VIA VIA ", ProcessorVendor_VIA},
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{"VMwareVMware", ProcessorVendor_VMware},
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{"Vortex86 SoC", ProcessorVendor_Vortex},
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{"XenVMMXenVMM", ProcessorVendor_XenHVM}
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};
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ProcessorVendor s_vendorEnum = ProcessorVendor_Unknown;
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bool s_capabilities[ProcessorCap_Max+1] = {false};
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bool s_initialized = false;
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char s_brandString[48] = "Not initialized";
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}
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void HardwareInfo::Cpuid(UInt32 functionId, UInt32 subFunctionId, UInt32 result[4])
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{
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return HardwareInfoImpl::Cpuid(functionId, subFunctionId, result);
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}
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String HardwareInfo::GetProcessorBrandString()
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{
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if (!Initialize())
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NazaraError("Failed to initialize HardwareInfo");
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return s_brandString;
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}
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unsigned int HardwareInfo::GetProcessorCount()
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{
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///DOC: Ne nécessite pas l'initialisation de HardwareInfo pour fonctionner
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static unsigned int processorCount = std::max(HardwareInfoImpl::GetProcessorCount(), 1U);
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return processorCount;
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}
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ProcessorVendor HardwareInfo::GetProcessorVendor()
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{
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if (!Initialize())
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NazaraError("Failed to initialize HardwareInfo");
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return s_vendorEnum;
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}
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String HardwareInfo::GetProcessorVendorName()
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{
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if (!Initialize())
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NazaraError("Failed to initialize HardwareInfo");
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return vendorNames[s_vendorEnum+1];
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}
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UInt64 HardwareInfo::GetTotalMemory()
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{
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///DOC: Ne nécessite pas l'initialisation de HardwareInfo pour fonctionner
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static UInt64 totalMemory = HardwareInfoImpl::GetTotalMemory();
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return totalMemory;
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}
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bool HardwareInfo::HasCapability(ProcessorCap capability)
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{
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#ifdef NAZARA_DEBUG
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if (capability > ProcessorCap_Max)
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{
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NazaraError("Capability type out of enum");
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return false;
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}
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#endif
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return s_capabilities[capability];
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}
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bool HardwareInfo::Initialize()
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{
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if (s_initialized)
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return true;
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if (!HardwareInfoImpl::IsCpuidSupported())
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{
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NazaraError("Cpuid is not supported");
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return false;
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}
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s_initialized = true;
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UInt32 registers[4]; // Récupère les quatre registres (EAX, EBX, ECX et EDX)
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// Pour plus de clarté
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UInt32& eax = registers[0];
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UInt32& ebx = registers[1];
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UInt32& ecx = registers[2];
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UInt32& edx = registers[3];
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// Pour commencer, on va récupérer l'identifiant du constructeur ainsi que l'id de fonction maximal supporté par le CPUID
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HardwareInfoImpl::Cpuid(0, 0, registers);
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// Attention à l'ordre : EBX, EDX, ECX
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UInt32 manufacturerId[3] = {ebx, edx, ecx};
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// Identification du concepteur
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s_vendorEnum = ProcessorVendor_Unknown;
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for (const VendorString& vendorString : vendorStrings)
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{
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if (std::memcmp(manufacturerId, vendorString.vendor, 12) == 0)
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{
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s_vendorEnum = vendorString.vendorEnum;
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break;
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}
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}
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if (eax >= 1)
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{
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// Récupération de certaines capacités du processeur (ECX et EDX, fonction 1)
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HardwareInfoImpl::Cpuid(1, 0, registers);
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s_capabilities[ProcessorCap_AVX] = (ecx & (1U << 28)) != 0;
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s_capabilities[ProcessorCap_FMA3] = (ecx & (1U << 12)) != 0;
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s_capabilities[ProcessorCap_MMX] = (edx & (1U << 23)) != 0;
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s_capabilities[ProcessorCap_SSE] = (edx & (1U << 25)) != 0;
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s_capabilities[ProcessorCap_SSE2] = (edx & (1U << 26)) != 0;
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s_capabilities[ProcessorCap_SSE3] = (ecx & (1U << 0)) != 0;
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s_capabilities[ProcessorCap_SSSE3] = (ecx & (1U << 9)) != 0;
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s_capabilities[ProcessorCap_SSE41] = (ecx & (1U << 19)) != 0;
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s_capabilities[ProcessorCap_SSE42] = (ecx & (1U << 20)) != 0;
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}
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// Récupération de la plus grande fonction étendue supportée (EAX, fonction 0x80000000)
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HardwareInfoImpl::Cpuid(0x80000000, 0, registers);
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UInt32 maxSupportedExtendedFunction = eax;
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if (maxSupportedExtendedFunction >= 0x80000001)
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{
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// Récupération des capacités étendues du processeur (ECX et EDX, fonction 0x80000001)
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HardwareInfoImpl::Cpuid(0x80000001, 0, registers);
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s_capabilities[ProcessorCap_x64] = (edx & (1U << 29)) != 0; // Support du 64bits, indépendant de l'OS
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s_capabilities[ProcessorCap_FMA4] = (ecx & (1U << 16)) != 0;
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s_capabilities[ProcessorCap_SSE4a] = (ecx & (1U << 6)) != 0;
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s_capabilities[ProcessorCap_XOP] = (ecx & (1U << 11)) != 0;
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if (maxSupportedExtendedFunction >= 0x80000004)
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{
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// Récupération d'une chaîne de caractère décrivant le processeur (EAX, EBX, ECX et EDX,
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// fonctions de 0x80000002 à 0x80000004 compris)
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char* ptr = &s_brandString[0];
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for (UInt32 code = 0x80000002; code <= 0x80000004; ++code)
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{
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HardwareInfoImpl::Cpuid(code, 0, registers);
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std::memcpy(ptr, ®isters[0], 4*sizeof(UInt32)); // On rajoute les 16 octets à la chaîne
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ptr += 4*sizeof(UInt32);
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}
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// Le caractère nul faisant partie de la chaîne retournée par le CPUID, pas besoin de le rajouter
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}
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}
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return true;
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}
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bool HardwareInfo::IsCpuidSupported()
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{
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return HardwareInfoImpl::IsCpuidSupported();
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}
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bool HardwareInfo::IsInitialized()
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{
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return s_initialized;
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}
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void HardwareInfo::Uninitialize()
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{
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// Rien à faire
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s_initialized = false;
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}
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}
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