417 lines
11 KiB
C++
417 lines
11 KiB
C++
// Copyright (C) 2023 Jérôme "Lynix" Leclercq (lynix680@gmail.com)
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// This file is part of the "Nazara Engine - Core module"
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// For conditions of distribution and use, see copyright notice in Config.hpp
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/*
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Copyright (C) 1999, 2000, 2002 Aladdin Enterprises. All rights reserved.
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any damages
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arising from the use of this software.
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Permission is granted to anyone to use this software for any purpose,
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including commercial applications, and to alter it and redistribute it
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freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you must not
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claim that you wrote the original software. If you use this software
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in a product, an acknowledgment in the product documentation would be
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appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and must not be
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misrepresented as being the original software.
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3. This notice may not be removed or altered from any source distribution.
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L. Peter Deutsch
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ghost@aladdin.com
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*/
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#include <Nazara/Core/Hash/MD5.hpp>
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#include <Nazara/Utils/Endianness.hpp>
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#include <cstring>
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#include <Nazara/Core/Debug.hpp>
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#define T_MASK (static_cast<UInt32>(~0))
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#define T1 /* 0xd76aa478 */ (T_MASK ^ 0x28955b87)
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#define T2 /* 0xe8c7b756 */ (T_MASK ^ 0x173848a9)
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#define T3 0x242070db
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#define T4 /* 0xc1bdceee */ (T_MASK ^ 0x3e423111)
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#define T5 /* 0xf57c0faf */ (T_MASK ^ 0x0a83f050)
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#define T6 0x4787c62a
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#define T7 /* 0xa8304613 */ (T_MASK ^ 0x57cfb9ec)
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#define T8 /* 0xfd469501 */ (T_MASK ^ 0x02b96afe)
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#define T9 0x698098d8
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#define T10 /* 0x8b44f7af */ (T_MASK ^ 0x74bb0850)
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#define T11 /* 0xffff5bb1 */ (T_MASK ^ 0x0000a44e)
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#define T12 /* 0x895cd7be */ (T_MASK ^ 0x76a32841)
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#define T13 0x6b901122
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#define T14 /* 0xfd987193 */ (T_MASK ^ 0x02678e6c)
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#define T15 /* 0xa679438e */ (T_MASK ^ 0x5986bc71)
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#define T16 0x49b40821
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#define T17 /* 0xf61e2562 */ (T_MASK ^ 0x09e1da9d)
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#define T18 /* 0xc040b340 */ (T_MASK ^ 0x3fbf4cbf)
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#define T19 0x265e5a51
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#define T20 /* 0xe9b6c7aa */ (T_MASK ^ 0x16493855)
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#define T21 /* 0xd62f105d */ (T_MASK ^ 0x29d0efa2)
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#define T22 0x02441453
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#define T23 /* 0xd8a1e681 */ (T_MASK ^ 0x275e197e)
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#define T24 /* 0xe7d3fbc8 */ (T_MASK ^ 0x182c0437)
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#define T25 0x21e1cde6
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#define T26 /* 0xc33707d6 */ (T_MASK ^ 0x3cc8f829)
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#define T27 /* 0xf4d50d87 */ (T_MASK ^ 0x0b2af278)
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#define T28 0x455a14ed
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#define T29 /* 0xa9e3e905 */ (T_MASK ^ 0x561c16fa)
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#define T30 /* 0xfcefa3f8 */ (T_MASK ^ 0x03105c07)
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#define T31 0x676f02d9
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#define T32 /* 0x8d2a4c8a */ (T_MASK ^ 0x72d5b375)
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#define T33 /* 0xfffa3942 */ (T_MASK ^ 0x0005c6bd)
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#define T34 /* 0x8771f681 */ (T_MASK ^ 0x788e097e)
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#define T35 0x6d9d6122
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#define T36 /* 0xfde5380c */ (T_MASK ^ 0x021ac7f3)
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#define T37 /* 0xa4beea44 */ (T_MASK ^ 0x5b4115bb)
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#define T38 0x4bdecfa9
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#define T39 /* 0xf6bb4b60 */ (T_MASK ^ 0x0944b49f)
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#define T40 /* 0xbebfbc70 */ (T_MASK ^ 0x4140438f)
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#define T41 0x289b7ec6
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#define T42 /* 0xeaa127fa */ (T_MASK ^ 0x155ed805)
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#define T43 /* 0xd4ef3085 */ (T_MASK ^ 0x2b10cf7a)
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#define T44 0x04881d05
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#define T45 /* 0xd9d4d039 */ (T_MASK ^ 0x262b2fc6)
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#define T46 /* 0xe6db99e5 */ (T_MASK ^ 0x1924661a)
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#define T47 0x1fa27cf8
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#define T48 /* 0xc4ac5665 */ (T_MASK ^ 0x3b53a99a)
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#define T49 /* 0xf4292244 */ (T_MASK ^ 0x0bd6ddbb)
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#define T50 0x432aff97
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#define T51 /* 0xab9423a7 */ (T_MASK ^ 0x546bdc58)
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#define T52 /* 0xfc93a039 */ (T_MASK ^ 0x036c5fc6)
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#define T53 0x655b59c3
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#define T54 /* 0x8f0ccc92 */ (T_MASK ^ 0x70f3336d)
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#define T55 /* 0xffeff47d */ (T_MASK ^ 0x00100b82)
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#define T56 /* 0x85845dd1 */ (T_MASK ^ 0x7a7ba22e)
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#define T57 0x6fa87e4f
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#define T58 /* 0xfe2ce6e0 */ (T_MASK ^ 0x01d3191f)
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#define T59 /* 0xa3014314 */ (T_MASK ^ 0x5cfebceb)
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#define T60 0x4e0811a1
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#define T61 /* 0xf7537e82 */ (T_MASK ^ 0x08ac817d)
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#define T62 /* 0xbd3af235 */ (T_MASK ^ 0x42c50dca)
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#define T63 0x2ad7d2bb
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#define T64 /* 0xeb86d391 */ (T_MASK ^ 0x14792c6e)
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namespace Nz
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{
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void MD5Hash::Append(const UInt8* data, std::size_t len)
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{
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const UInt8 *p = data;
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std::size_t left = len;
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int offset = (m_count[0] >> 3) & 63;
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std::size_t nbits = len << 3;
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if (len <= 0)
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return;
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/* Update the message length. */
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m_count[1] += len >> 29;
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m_count[0] += nbits;
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if (m_count[0] < nbits)
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m_count[1]++;
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/* Process an initial partial block. */
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if (offset)
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{
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std::size_t copy = (offset + len > 64 ? 64 - offset : len);
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std::memcpy(m_buf + offset, p, copy);
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if (offset + copy < 64)
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return;
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p += copy;
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left -= copy;
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md5_process(m_buf);
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}
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/* Process full blocks. */
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for (; left >= 64; p += 64, left -= 64)
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md5_process(p);
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/* Process a final partial block. */
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if (left)
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std::memcpy(m_buf, p, left);
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}
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void MD5Hash::Begin()
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{
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m_count[0] = m_count[1] = 0;
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m_abcd[0] = 0x67452301;
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m_abcd[1] = /*0xefcdab89*/ T_MASK ^ 0x10325476;
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m_abcd[2] = /*0x98badcfe*/ T_MASK ^ 0x67452301;
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m_abcd[3] = 0x10325476;
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}
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ByteArray MD5Hash::End()
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{
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static const unsigned char pad[64] = {
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0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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};
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UInt8 data[8];
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int i;
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/* Save the length before padding. */
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for (i = 0; i < 8; ++i)
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data[i] = static_cast<UInt8>(m_count[i >> 2] >> ((i & 3) << 3));
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/* Pad to 56 bytes mod 64. */
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Append(pad, ((55 - (m_count[0] >> 3)) & 63) + 1);
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/* Append the length. */
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Append(data, 8);
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UInt8 digest[16];
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for (i = 0; i < 16; ++i)
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digest[i] = static_cast<UInt8>(m_abcd[i >> 2] >> ((i & 3) << 3));
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return ByteArray(&digest[0], 16);
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}
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std::size_t MD5Hash::GetDigestLength() const
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{
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return 16;
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}
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const char* MD5Hash::GetHashName() const
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{
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return "MD5";
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}
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void MD5Hash::md5_process(const UInt8* data)
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{
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UInt32 a = m_abcd[0];
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UInt32 b = m_abcd[1];
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UInt32 c = m_abcd[2];
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UInt32 d = m_abcd[3];
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UInt32 t;
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#ifdef NAZARA_BIG_ENDIAN
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/* Define storage only for big-endian CPUs. */
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UInt32 X[16];
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/*
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* On big-endian machines, we must arrange the bytes in the
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* right order.
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*/
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const UInt8* xp = data;
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int i;
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for (i = 0; i < 16; ++i, xp += 4)
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X[i] = xp[0] + (xp[1] << 8) + (xp[2] << 16) + (xp[3] << 24);
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#else
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/* Define storage for little-endian or both types of CPUs. */
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UInt32 xbuf[16];
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const UInt32* X;
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/*
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* On little-endian machines, we can process properly aligned
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* data without copying it.
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*/
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if (!((data - static_cast<const UInt8*>(nullptr)) & 3))
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{
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/* data are properly aligned */
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X = reinterpret_cast<const UInt32*>(data);
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}
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else
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{
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/* not aligned */
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std::memcpy(xbuf, data, 64);
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X = xbuf;
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}
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#endif
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#define ROTATE_LEFT(x, n) (((x) << (n)) | ((x) >> (32 - (n))))
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/* Round 1. */
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/* Let [abcd k s i] denote the operation
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a = b + ((a + F(b,c,d) + X[k] + T[i]) <<< s). */
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#define F(x, y, z) (((x) & (y)) | (~(x) & (z)))
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#define SET(a, b, c, d, k, s, Ti)\
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t = a + F(b,c,d) + X[k] + Ti;\
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a = ROTATE_LEFT(t, s) + b
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/* Do the following 16 operations. */
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SET(a, b, c, d, 0, 7, T1);
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SET(d, a, b, c, 1, 12, T2);
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SET(c, d, a, b, 2, 17, T3);
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SET(b, c, d, a, 3, 22, T4);
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SET(a, b, c, d, 4, 7, T5);
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SET(d, a, b, c, 5, 12, T6);
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SET(c, d, a, b, 6, 17, T7);
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SET(b, c, d, a, 7, 22, T8);
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SET(a, b, c, d, 8, 7, T9);
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SET(d, a, b, c, 9, 12, T10);
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SET(c, d, a, b, 10, 17, T11);
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SET(b, c, d, a, 11, 22, T12);
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SET(a, b, c, d, 12, 7, T13);
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SET(d, a, b, c, 13, 12, T14);
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SET(c, d, a, b, 14, 17, T15);
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SET(b, c, d, a, 15, 22, T16);
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#undef SET
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#undef F
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/* Round 2. */
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/* Let [abcd k s i] denote the operation
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a = b + ((a + G(b,c,d) + X[k] + T[i]) <<< s). */
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#define G(x, y, z) (((x) & (z)) | ((y) & ~(z)))
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#define SET(a, b, c, d, k, s, Ti)\
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t = a + G(b,c,d) + X[k] + Ti;\
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a = ROTATE_LEFT(t, s) + b
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/* Do the following 16 operations. */
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SET(a, b, c, d, 1, 5, T17);
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SET(d, a, b, c, 6, 9, T18);
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SET(c, d, a, b, 11, 14, T19);
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SET(b, c, d, a, 0, 20, T20);
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SET(a, b, c, d, 5, 5, T21);
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SET(d, a, b, c, 10, 9, T22);
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SET(c, d, a, b, 15, 14, T23);
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SET(b, c, d, a, 4, 20, T24);
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SET(a, b, c, d, 9, 5, T25);
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SET(d, a, b, c, 14, 9, T26);
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SET(c, d, a, b, 3, 14, T27);
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SET(b, c, d, a, 8, 20, T28);
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SET(a, b, c, d, 13, 5, T29);
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SET(d, a, b, c, 2, 9, T30);
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SET(c, d, a, b, 7, 14, T31);
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SET(b, c, d, a, 12, 20, T32);
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#undef SET
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#undef G
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/* Round 3. */
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/* Let [abcd k s t] denote the operation
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a = b + ((a + H(b,c,d) + X[k] + T[i]) <<< s). */
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#define H(x, y, z) ((x) ^ (y) ^ (z))
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#define SET(a, b, c, d, k, s, Ti)\
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t = a + H(b,c,d) + X[k] + Ti;\
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a = ROTATE_LEFT(t, s) + b
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/* Do the following 16 operations. */
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SET(a, b, c, d, 5, 4, T33);
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SET(d, a, b, c, 8, 11, T34);
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SET(c, d, a, b, 11, 16, T35);
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SET(b, c, d, a, 14, 23, T36);
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SET(a, b, c, d, 1, 4, T37);
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SET(d, a, b, c, 4, 11, T38);
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SET(c, d, a, b, 7, 16, T39);
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SET(b, c, d, a, 10, 23, T40);
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SET(a, b, c, d, 13, 4, T41);
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SET(d, a, b, c, 0, 11, T42);
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SET(c, d, a, b, 3, 16, T43);
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SET(b, c, d, a, 6, 23, T44);
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SET(a, b, c, d, 9, 4, T45);
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SET(d, a, b, c, 12, 11, T46);
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SET(c, d, a, b, 15, 16, T47);
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SET(b, c, d, a, 2, 23, T48);
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#undef SET
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#undef H
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/* Round 4. */
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/* Let [abcd k s t] denote the operation
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a = b + ((a + I(b,c,d) + X[k] + T[i]) <<< s). */
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#define I(x, y, z) ((y) ^ ((x) | ~(z)))
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#define SET(a, b, c, d, k, s, Ti)\
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t = a + I(b,c,d) + X[k] + Ti;\
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a = ROTATE_LEFT(t, s) + b
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/* Do the following 16 operations. */
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SET(a, b, c, d, 0, 6, T49);
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SET(d, a, b, c, 7, 10, T50);
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SET(c, d, a, b, 14, 15, T51);
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SET(b, c, d, a, 5, 21, T52);
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SET(a, b, c, d, 12, 6, T53);
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SET(d, a, b, c, 3, 10, T54);
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SET(c, d, a, b, 10, 15, T55);
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SET(b, c, d, a, 1, 21, T56);
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SET(a, b, c, d, 8, 6, T57);
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SET(d, a, b, c, 15, 10, T58);
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SET(c, d, a, b, 6, 15, T59);
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SET(b, c, d, a, 13, 21, T60);
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SET(a, b, c, d, 4, 6, T61);
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SET(d, a, b, c, 11, 10, T62);
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SET(c, d, a, b, 2, 15, T63);
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SET(b, c, d, a, 9, 21, T64);
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#undef SET
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#undef I
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#undef ROTATE_LEFT
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/* Then perform the following additions. (That is increment each
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of the four registers by the value it had before this block
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was started.) */
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m_abcd[0] += a;
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m_abcd[1] += b;
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m_abcd[2] += c;
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m_abcd[3] += d;
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}
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}
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#undef T_MASK
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#undef T1
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#undef T2
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#undef T3
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#undef T4
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#undef T5
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#undef T6
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#undef T7
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#undef T8
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#undef T9
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#undef T10
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#undef T11
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#undef T12
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#undef T13
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#undef T14
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#undef T15
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#undef T16
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#undef T17
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#undef T18
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#undef T19
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#undef T20
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#undef T21
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#undef T22
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#undef T23
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#undef T24
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#undef T25
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#undef T26
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#undef T27
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#undef T28
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#undef T29
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#undef T30
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#undef T31
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#undef T32
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#undef T33
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#undef T34
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#undef T35
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#undef T36
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#undef T37
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#undef T38
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#undef T39
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#undef T40
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#undef T41
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#undef T42
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#undef T43
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#undef T44
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#undef T45
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#undef T46
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#undef T47
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#undef T48
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#undef T49
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#undef T50
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#undef T51
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#undef T52
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#undef T53
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#undef T54
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#undef T55
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#undef T56
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#undef T57
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#undef T58
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#undef T59
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#undef T60
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#undef T61
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#undef T62
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#undef T63
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#undef T64
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